Product Summary
The dual N-Channel enhancement mode power field effect transistors are produced using high cell density, DMOS technology. This very high density process has been designed to minimize on-state resistance, provide rugged and reliable performance and fast switching. The NDC7002N is particularly suited for low voltage applications requiring a low current high side switch.
Parametrics
NDC7002N absolute maximum ratings: (1)Drain-Source Voltage: 50 V; (2)Gate-Source Voltage - Continuous: 20 V; (3)Drain Current - Continuous: 0.51 A; (4)Maximum Power Dissipation: 0.96 W; (5)Operating and Storage Temperature Range: -55 to 150 ℃.
Features
NDC7002N features: (1)0.51A, 50V, RDS(ON) = 2W @ VGS=10V; (2)High density cell design for low RDS(ON); (3)Proprietary SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities; (4)High saturation current.
Diagrams
Image | Part No | Mfg | Description | ![]() |
Pricing (USD) |
Quantity | ||||||||||||
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![]() NDC7002N |
![]() Fairchild Semiconductor |
![]() MOSFET SO-6 N-CH ENHANCE |
![]() Data Sheet |
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![]() NDC7002N_Q |
![]() Fairchild Semiconductor |
![]() MOSFET SO-6 N-CH ENHANCE |
![]() Data Sheet |
![]() Negotiable |
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![]() NDC7002N_SB9G007 |
![]() Fairchild Semiconductor |
![]() MOSFET 50V DUAL N-CHANNEL |
![]() Data Sheet |
![]() Negotiable |
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