Product Summary

The W9825G6JH-6 is a high-speed synchronous dynamic random access memory (SDRAM). The W9825G6JH-6 organized as 4M words × 4 banks × 16 bits. The W9825G6JH-6 delivers a data bandwidth of up to 200M words per second (-5). To fully comply with the personal computer industrial standard, the W9825G6JH-6 is sorted into the following speed grades: -5, -6, -6I, -6A, -6L, -75 and 75L. The -5 grade parts is compliant to the 200MHz/CL3 specification. The -6 grade parts is compliant to the 166MHz/CL3 or 133MHz/CL2 specification. The -6I/-6A/-6L grade parts of the W9825G6JH-6 are compliant to the 166MHz/CL3 specification. The -75/75L of the W9825G6JH-6 is compliant to the 133MHz/CL3 specification. The -6L and 75L parts of the W9825G6JH-6 support self refresh current IDD6 max. 1.5 mA.

Parametrics

W9825G6JH-6 absolute maximum ratings: (1)Voltage on any pin relative to VSS, VIN: -0.5 to VDD+0.5 V; (2)Voltage on VDD/VDDQ supply relative to VSS, VDD: -0.5 to 4.6 V; (3)Operating Temperature, TOPR: 0 to 70 ℃; (4)Storage Temperature, TSTG: -55 to 150 ℃; (5)Soldering Temperature (10s), TSOLDER: 260 ℃; (6)Power Dissipation, PD: 1 W; (7)Short Circuit Output Current, IOUT: 50 mA.

Features

W9825G6JH-6 features: (1)3.3V ± 0.3V Power Supply; (2)Up to 200 MHz Clock Frequency; (3)4,194,304 Words × 4 Banks × 16 Bits Organization; (4)Self Refresh Mode: Standard and Low Power; (5)CAS Latency: 2 and 3; (6)Burst Length: 1, 2, 4, 8 and Full Page ; (7)Burst Read, Single Writes Mode; (8)Byte Data Controlled by LDQM, UDQM; (9)Power Down Mode; (10)Auto-precharge and Controlled Precharge; (11)8K Refresh Cycles/64 mS; (12)Interface: LVTTL; (13)Packaged in TSOP II 54-pin, 400 mil - 0.80, using Lead free materials with RoHS compliant.

Diagrams

W9825G6JH-6 block diagram

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
W9825G6JH-6I
W9825G6JH-6I


IC SDRAM 256MBIT 54TSOPII

Data Sheet

0-1: $1.87
1-10: $1.68
10-25: $1.66
25-50: $1.65
50-100: $1.48
100-250: $1.43
250-500: $1.42
500-1000: $1.32
1000-2500: $1.30
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