LPC1765FBD100

LPC1765FBD100, ARM Cortex-M3 based microcontroller, 4000 V, 100 mA, 80 MHz, QFP

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Price:: US $0.30~0.50 / piece [Get Latest Price]

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1 ~ 1000 :	0.50 / Piece
1001 ~ 10000 :	0.40 / Piece
10001 ~ 100000 :	0.30 / Piece

PartNumber:: LPC1765FBD100

Brand:: NXP Semiconductors - nxp | Pack: LQFP | D/C: 13+

Availability:: Supply Ability: 10000/Day Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2013-07-31

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Part Number:LPC1765FBD100
US $0.30 - 0.50
LPC1765FBD100 QFP integrated circuit chip

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Product Summary

The LPC1765FBD100 is an ARM Cortex-M3 based microcontroller for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration. The LPC1765FBD100 operates at CPU frequencies of up to 100 MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The applications of the LPC1765FBD100 include: eMetering, Alarm systems, Lighting, White goods, Industrial networking, Motor control.

Parametrics

LPC1765FBD100 absolute maximum ratings: (1)VIA analog input voltage: -0.5 to +5.1 V; (2)VI input voltage: -0.5 to +5.5 V; (3)IDD supply current: 100 mA; (4)ISS ground current: 100 mA; (5)Ilatch I/O latch-up current: 100 mA; (6)Tstg storage temperature: -65 to +150 ℃; (7)Ptot(pack) total power dissipation (per package): 1.5 W; (8)VESD electrostatic discharge voltage: -4000 to +4000 V.

Features

LPC1765FBD100 features: (1)ARM Cortex-M3 processor, running at frequencies of up to 80 MHz. A Memory Protection Unit (MPU)supporting eight regions is included.; (2)ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).; (3)256 kB on-chip flash programmimg memory. Enhanced flash memory accelerator enables high-speed 80 MHz operation with zero wait states.; (4)In-System Programming (ISP)and In-Application Programming (IAP)via on-chip boot loader software.; (5)? 32 kB of SRAM on the CPU with local code/data bus for high-performance CPU access.; (6)? Two 16 kB SRAM blocks with separate access paths for higher throughput. These SRAM blocks may be used for Ethernet, USB, and DMA memory, as well as for general purpose CPU instruction and data storage.