Product Summary

The EPM7032AELC44-10 is a high-density, high performance device based on Alteras second-generation MAX architecture. Fabricated with advanced CMOS technology, the EPM7032AELC44-10 operates with a 3.3-V supply voltage and provide 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, and counter speeds of up to 227.3 MHz. The EPM7032AELC44-10 in the -4, -5, -6, -7, and some -10 speed grades are compatible with the timing requirements for 33 MHz operation of the PCI Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2.

Parametrics

EPM7032AELC44-10 absolute maximum ratings: (1)VCC Supply voltage With respect to ground: –0.5 to 4.6 V; (2)VI DC input voltage: –2.0 to 5.75 V; (3)IOUT DC output current, per pin: –25 to 25 mA; (4)TSTG Storage temperature No bias: –65 to 150 ° C; (5)TA Ambient temperature Under bias: –65 to 135 ° C; (6)TJ Junction temperature BGA, FineLine BGA, PQFP, and TQFP packages, under bias: 135 ° C.

Features

EPM7032AELC44-10 features: (1)High-performance 3.3-V EEPROM-based programmable logic devices (PLDs)built on second-generation Multiple Array MatriX (MAX)architecture; (2)3.3-V in-system programmability (ISP)through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG)interface with advanced pin-locking capability; (3)Built-in boundary-scan test (BST)circuitry compliant with IEEE Std. 1149.1; (4)Supports JEDEC Jam Standard Test and Programming Language (STAPL)JESD-71; (5)Enhanced ISP features; (6)Pin-compatible with the popular 5.0-V MAX 7000S devices; (7)High-density PLDs ranging from 600 to 10,000 usable gates; (8)Extended temperature range.

Diagrams

EPM7032AELC44-10 pin connection

Image Part No Mfg Description Data Sheet Download Pricing
(USD)		 Quantity
EPM7032AELC44-10
EPM7032AELC44-10

IC MAX 7000 CPLD 32 44-PLCC
Data Sheet
0-1: $1.26
EPM7032AELC44-10N
EPM7032AELC44-10N

IC MAX 7000 CPLD 32 44-PLCC
Data Sheet
0-1: $1.26