SN74LVTH245APW

SN74LVTH245APW, 3.3-V ABT 16-bit Edge-Triggered D-type flip-flop, 30mA, 50mA, -0.5V to 7V, TSSOP48

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Price:: US $0.30~0.50 / piece [Get Latest Price]

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Qty (lots)	Price/lot
1 ~ 1000 :	0.50 / Piece
1001 ~ 10000 :	0.40 / Piece
10001 ~ 100000 :	0.30 / Piece

PartNumber:: SN74LVTH245APW

Brand:: Texas Instruments - TI | Pack: TSSOP | D/C: 13+

Availability:: Supply Ability: 100000/Day Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

Quantity:: piece

Total Price:: US $0

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Products Upload time: 2013-06-17

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Part Number:SN74LVTH245APW
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Product Summary

The SN74LVTH245APW is a 3.3-V ABT 16-bit Edge-Triggered D-type flip-flop with 3-state outputs. The SN74LVTH245APW is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The SN74LVTH245APW can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK), the Q outputs of the flip-flop take on the logic levels set up at the D inputs.

Parametrics

SN74LVTH245APW absolute maximum ratings: (1)Supply voltage range: -0.5V to 4.6V; (2)Input voltage range: -0.5V to 7 V; (3)Voltage range applied to any output in the high-impedance or power-off state: -0.5V to 7V; (4)Voltage range applied to any output in the high state: -0.5V to VCC+0.5V; (5)Current into any output in the low state: 30mA; (6)Current into any output in the high state: 30mA; (7)Input clamp current VI＜0 :–50mA; (8)Output clamp current VO＜0 :–50mA; (9)θJA Package thermal impedance: 70℃/W; (10)Storage temperature range: –65℃ to 150℃.

Features

SN74LVTH245APW features: (1)Members of the Texas Instruments Widebus Family; (2)Output Ports Have Equivalent 22-Ω Series Resistors, So No External Resistors Are Required; (3)Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC); (4)Support Unregulated Battery Operation Down to 2.7 V; (5)Typical VOLP (Output Ground Bounce)＜0.8 V at VCC = 3.3 V, TA = 25℃; (6)Ioff and Power-Up 3-State Support Hot Insertion; (7)Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors; (8)Distributed VCC and GND Pins Minimize High-Speed Switching Noise; (9)Flow-Through Architecture Optimizes PCB Layout; (10)Latch-Up Performance Exceeds 500mA Per JESD 17; (11)ESD Protection Exceeds JESD 22: 2000-V Human-Body Model (A114-A), 200-V Machine Model (A115-A).