(Hong Kong)
Product Summary
The SN74HC74DR is a dual d-type positive-edge-triggered flip-flop. The SN74HC74DR contains two independent D-type positive-edge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
Parametrics
SN74HC74DR absolute maximum ratings: (1)Supply voltage range, VCC: –0.5 V to 7 V; (2)Input clamp current, I IK (VI < 0 or VI > VCC)(see Note 1): ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC)(see Note 1): ±20 mA; (3)Continuous output current, IO (VO = 0 to VCC): ±25 mA; (4)Continuous current through VCC or GND: ±50 mA; (5)Storage temperature range, Tstg:–65°C to 150°C.
Features
SN74HC74DR features: (1)Wide Operating Voltage Range of 2 V to 6 V; (2)Outputs Can Drive Up To 10 LSTTL Loads; (3)Low Power Consumption, 40-µA Max ICC; (4)Typical tpd = 15 ns; (5)±4-mA Output Drive at 5 V; (6)Low Input Current of 1 µA Max.
Diagrams
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 SN74HC74DR |
Texas Instruments |
Flip Flops Dual |
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SN74HC74DRE4 |
Texas Instruments |
Flip Flops Dual Pos-Edge-Trig D-Type Flip-Flop |
Data Sheet |
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SN74HC74DRG4 |
Texas Instruments |
Flip Flops Dual Pos-Edge-Trig D-Type Flip-Flop |
Data Sheet |
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