Product Summary

The NT5TU64M16GG-AC is a 1Gb Double-Data-Rate-2 (DDR2) DRAM. It is a high-speed CMOS Double Data Rate 2 SDRAM containing 1,073,741,824 bits. It is internally configured as an octal-bank DRAM. The NT5TU64M16GG-AC is organized as 32Mbit x 4 I/O x 8 bank, 16Mbit x 8 I/O x 8 bank or 8Mbit x 16 I/O x 8 bank device. The NT5TU64M16GG-AC achieves high speed double-data-rate transfer rates of up to 800 Mb/sec/pin for general appli-cations. The NT5TU64M16GG-AC is designed to comply with all key DDR2 DRAM key features: (1) posted CAS with additive latency, (2) write latency = read latency -1, (3) normal and weak strength data-output driver, (4) variable data-output impedance adjustment and (5) an ODT (On-Die Termination) function.

Parametrics

NT5TU64M16GG-AC absolute maximum ratings: (1)VDD Voltage on VDD pin relative to VSS: -1.0 to + 2.3V; (2)VDDQ Voltage on VDDQ pin relative to VSS: -0.5 to + 2.3V; (3)VDDL Voltage on VDDL pin relative to VSS: -0.5 to + 2.3V; (4)VIN, VOUT Voltage on any pin relative to VSS: -0.5 to + 2.3V; (5)TSTG Storage Temperature: -55 to + 100℃.

Features

NT5TU64M16GG-AC features: (1)1.8V±0.1V Power Supply Voltage; (2)8 internal memory banks; (3)Programmable CAS Latency: 5 (DDR2-3C); 6 (DDR2-AD); (4)Programmable Additive Latency: 0, 1, 2, 3, 4 5; (5)Write Latency = Read Latency -1; (6)Programmable Burst Length:; (7)4 and 8 Programmable Sequential / Interleave Burst; (8)OCD (Off-Chip Driver Impedance Adjustment); (9)ODT (On-Die Termination); (10)4 bit prefetch architecture; (11)Data-Strobes: Bidirectional, Differential; (12)1KB page size for x4 and x8; 2KB page size for x16; (13)Strong and Weak Strength Data-Output Driver; (14)Auto-Refresh and Self-Refresh; (15)Power Saving Power-Down modes; (16)7.8μs max. Average Periodic Refresh Interval; (17)RoHS Compliance; (18)Packages: 60-Ball BGA for x4 / x8 components; 84-Ball BGA for x16 components.

Diagrams

NT5TU64M16GG-AC block diagram