LM3S5P36-IQR80-C5

Product Summary

The LM3S5P36-IQR80-C5 is a Microcontroller. Texas Instruments is the industry leader in bringing 32-bit capabilities and the full benefits of ARM Cortex-M-based the LM3S5P36-IQR80-C5 to the broadest reach of the microcontroller market. For current users of 8- and 16-bit MCUs, Stellaris with Cortex-M offers a direct path to the strongest ecosystem of development tools, software and knowledge in the industry. Designers who migrate to Stellaris benefit from great tools, small code footprint and outstanding performance. Even more important, designers can enter the ARM ecosystem with full confidence in a compatible roadmap from $1 to 1 GHz. For users of current 32-bit MCUs, the Stellaris family offers the industrys first implementation of Cortex-M3 and the Thumb-2 instruction set.

Parametrics

LM3S5P36-IQR80-C5 absolute maximum ratings: (1)VESDHBM: 2.0 kV; (2)VESDCDM: 500 V; (3)VDD VDD supply voltage: 0 to 4 V; (4)VDDA VDDA supply voltage: 0 to 4 V; (5)VBAT VBAT battery supply voltage: 0 4 V; (6)VIN_GPIO Input voltageb -0.3 5.5 V; (7)VIN_GPIO Input voltage for PB0 and PB1 when configured as GPIO: -0.3 to VDD + 0.3 V; (8)IGPIOMAX Maximum current per output pin: 25 mA; (9)VNON Maximum input voltage on a non-power pin when the microcontroller is unpowered: 300 mV.

Features

LM3S5P36-IQR80-C5 features: (1)32-bit ARM Cortex-M3 architecture optimized for small-footprint embedded applications; (2)80-MHz operation; 100 DMIPS performance; (3)Outstanding processing performance combined with fast interrupt handling; (4)Fast code execution permits slower processor clock or increases sleep mode time; (5)Harvard architecture characterized by separate buses for instruction and data; (6)Efficient processor core, system and memories; (7)Hardware division and fast digital-signal-processing orientated multiply accumulate; (8)Saturating arithmetic for signal processing; (9)Deterministic, high-performance interrupt handling for time-critical applications; (10)Memory protection unit (MPU)to provide a privileged mode for protected operating system functionality

Diagrams