Product Summary
The 74LVC00AD,112 is a Quad 2-input NAND gate. The low power, low-voltage, Si-gate CMOS The 74LVC00AD,112 and superior to most advanced CMOS compatible TTL familie. Schmitt-trigger action at all input make the circuit tolerant for slower input rise and fall time.
Parametrics
74LVC00AD,112 absolute maximum ratings: (1)VCC DC supply voltage (for max. speed performance): –0.5 to +6.5 V; (2)I IK DC input diode current VI <0: –50 mA; (3)VI DC input voltage Note 2: –0.5 to +5.5 V; (4)IOK DC output diode current VO <VCC or VO < 0 : 50 mA; (5)VO DC output voltage Note 2: –0.5 to VCC + 0.5 V; (6)IO DC output source or sink current VO = 0 to VCC: 50 mA; (7)IGND, ICC DC VCC or GND current: 100 mA; (8)Tstg Storage temperature range: –65°C to +150 °C; (9)PTOT Power dissipation per package – plastic mini-pack (SO)above +70°C derate linearly with 8 mW/K: 500 mW.
Features
74LVC00AD,112 features: (1)Wide supply range of 1.2V to 3.6V; (2)Complies with JEDEC standard no. 8-1A; (3)Inputs accept voltages up to 5.5V; (4)CMOS low power consumption; (5)Direct interface with TTL levels; (6)5-volt tolerant inputs, for interfacing with 5-volt logi.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
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74LVC00AD,112 |
NXP Semiconductors |
Gates (AND / NAND / OR / NOR) 3.3V QUAD 2-INPUT |
Data Sheet |
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Image | Part No | Mfg | Description | Pricing (USD) |
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74LV00 |
Other |
Data Sheet |
Negotiable |
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74LV00BQ,115 |
NXP Semiconductors |
Gates (AND / NAND / OR / NOR) 3.3V QUAD 2-INPUT |
Data Sheet |
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74LV00D |
Other |
Data Sheet |
Negotiable |
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74LV00D,112 |
NXP Semiconductors |
Gates (AND / NAND / OR / NOR) QUAD 2-INPUT NAND |
Data Sheet |
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74LV00D,118 |
NXP Semiconductors |
Gates (AND / NAND / OR / NOR) QUAD 2-INPUT NAND |
Data Sheet |
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74LV00DB,112 |
NXP Semiconductors |
Gates (AND / NAND / OR / NOR) QUAD 2-INPUT NAND |
Data Sheet |
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