(Hong Kong)
Product Summary
The 74HC165D-T is a 8-bit parallel-in/serial-out shift register that complies with JEDEC standard no. 7A. It is pin compatible with Low-power Schottky TTL (LSTTL). The 74HC165D-T is an 8-bit parallel-load or serial-in shift register with complementary serial outputs (Q7 and Q7) available from the last stage. When the parallel load (PL) input is LOW, parallel data from the D0 to D7 inputs are loaded into the register asynchronously.
Parametrics
74HC165D-T absolute maximum ratings: (1)VCC, supply voltage: -0.5 to +7 V; (2)IIK, input clamping current VI < -0.5 V or VI > VCC + 0.5 V: ±20mA max; (3)IOK, output clamping current VO < -0.5 V or VO > VCC + 0.5 V: ±20mA max; (4)IO, output current -0.5 V < VO < VCC + 0.5 V: ±25mA max; (5)ICC, supply current: - 50mA max; (6)IGND ground current: -50mA min; (7)Tstg, storage temperature: -65 to +150 ℃.
Features
74HC165D-T features: (1) Asynchronous 8-bit parallel load; (2) Synchronous serial input; (3)Complies with JEDEC standard no. 7A; (4)ESD protection: HBM JESD22-A114E exceeds 2000 V; MM JESD22-A115-A exceeds 200 V; (5)Specified from -40 ℃ to +85℃ and from -40 ℃ to +125 ℃.
Diagrams
